Channel Slicing: a Way to Build Fast Routers for Asynchronous NoCs

Asynchronous on-chip networks are power efficient and tolerant to process variation but they are slower than synchronous on-chip networks. One reason for the low speed is the way that asynchronous routers use to build wide channels. To meet the bandwidth requirement, current routers broaden their channels by synchronizing multiple sub-channels. The C-element tree in the completion detection circuit increases the cycle period. A low latency asynchronous wormhole router is proposed using sliced subchannels. Channel slicing removes the C-element tree in the completion detection circuit and convert a channel into multiple independent sub-channels reducing the cycle period. The router is implemented by a 0.13 μm technology. The cycle period of the router at the typical corner is 2.2 ns, providing 1.82 GByte/sec throughput per port.